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i.MX25 NAND, Boot Question

Question asked by John Sawyer on Feb 22, 2019
Latest reply on Feb 22, 2019 by igorpadykov

We would like to use a Micron MT29F1G08ABAEAWP NAND Flash memory device.with the i.MX25.

The Micron NAND x8 device is organized using a 2048 page size plus 64 spare bytes.

We are using these settings:

BT_PAGE_SIZE = 01 (2K)

BT_BUS_WIDTH = 00 (8b)

BT_MLS_SEL = 0 (SLC)

BT_SPARE_SIZE = 0

BT_MEM_CTRL = 01 (NAND)

BT_MEM_TYPE = 10 (5 address cycles)

We think this memory should work with the i.MX25.  It does have this cryptic note in the datasheet:

    Minimum required ECC for block 0 if PROGRAM/ERASE cycles are less than 1000  :  1-bit ECC per 528 bytes

Would you agree that this device should be compatible with the i.MX25 boot sequence and NFC operations?

 

If yes, we don't see the i.MX25 boot sequence send the 0x30 command for the READ PAGE command, so the NAND does not output data.

 

Thank you!

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