Is there any document about how to use lvds in android8 of imx8mq platform ?
sorry, I got it, it much convert MIPI to LVDS.
Can you please share your findings so others can use it?
Not finish yet, I will update after finish.
Shenzhen Huameishi Technology Co., Ltd
Have you done MIPI-DSI for LVDS?
yes, I have finish it.
My solution is to use a TI mipi to lvds chip (sn65dsi85).
I integrated it as panel rm67191 (reference to panel-raydium-rm67191.c ) and use DCSS as the display device.
Thanks for the reply. In my case I'm using SN65DSI84 as bridge and auo t21hvn01 for panel. Can you share your changes in fsl-imx8mq-com.dts & fsl-imx8mq-com.dtsi files?
Can I ask you what panel you have used? If the panel is not similar, I guess I need to write drm brdge driver for panel-simple.c
In my so far combinations I couldn't see DSI clock.
Hope it can help for you.
BTW, some clock doesn't support by imx8mq, you can higher it up a little.
Thanks for your share！ I added the panel-sn65dsix.c and panel-dsi85.h into my ststem， and I encountered such a problem，the dmesg indicated that
the mipi_dsi_bridge can't find the i2c client device sn65dsi8x.
I added some log massages and then i find that the sn65dsi8x client_dev->dev.driver = NULL. Is the sn65dsi8x need a i2c device driver?, Have you encountered this problem?
My kernel log:
[ 1.052093] [drm] Initialized [ 1.061372] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.068015] [drm] No driver support for vblank timestamp query. [ 1.074129] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops) [ 1.081637] nwl_dsi-imx mipi_dsi@30A00000: Using DCSS as input source [ 1.088478] panel-ti-sn65dsi8x 30a00000.mipi_dsi_bridge.0: failed to find client platform device [ 1.097285] panel-ti-sn65dsi8x 30a00000.mipi_dsi_bridge.0: Yao-log:client_dev->dev.driver == NULL!!! [ 1.106541] nwl-mipi-dsi 30a00000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x813 [ 1.116450] imx-drm display-subsystem: bound mipi_dsi@30A00000 (ops imx_nwl_dsi_component_ops) [ 1.129560] [drm] OPIPE_CFG: gamut = 3, nl = 1, pr = 1, pix_format = 875713089 [ 1.655077] function:sn65_panel_enable line:1044 ----------- [ 1.721128] Console: switching to colour frame buffer device 240x67 [ 1.783389] imx-drm display-subsystem: fb0: frame buffer device
Thanks & Best Regards
It just a simple driver provided i2c client for panel-sn65dsi.c.
Follow your offered sn65dsi85 driver, I can dispaly 800x600@60Hz while use sn65dsi84 for mipi conver lvds， but encounter an "no singal" tips on another LCD with 1920x1080 resolution， when set CCSR 0x3c as 0x10, I can got the test pattern, could you remind me what's wrong in the process。
BTW，use the same dts and kernel, I do the blowing test:
1) test pattern with single lvds chanel mode on a 800x600 lcd -- ok
2) mipidsi show image to lvds single lvds chanel mode on 800x600 lcd -ok
3) test pattern with dual lvds chanel mode on a 1920x1080 lcd -- ok
4) test pattern witch dual lvds chanel mode (forced in 800x600@60hz) on the 1920x1080 lcd -ok
5) mipi dsi show image to lvds with dual lvds chanel mode (forced in 800x600@60hz) fail, but while connect the 800x600 resolution lcd in one lvds channel, i got the image.
Most likely it's the display_timing problem.
I'm also trying to enable sn65dsi84 on our custom board, we use a 1024*600 LVDS panel.
However, the DSI driver can't work out the CM/CN/CO values for D-PHY ref_clk.
Could you share your dts file and timing table of the panel?
imx_nwl_try_phy_speed (583): bit_clk = 403200000 ; pixclock = 50400000
nwl_dsi-imx mipi_dsi@30A00000: [drm:imx_nwl_try_phy_speed] *ERROR* Cannot setup PHY for mode: 1024x600 @50400 kHz
nwl_dsi-imx mipi_dsi@30A00000: [drm:imx_nwl_try_phy_speed] *ERROR* PHY_REF clk: 27000000, bit clk: 403200000
Thanks a lot.
you can turn up the frequency.
For 1024*600 LVDS, I success in kernel 4.9 but fail in 4.14.
Thanks for your reply.
I found the algorithm of computing CM/CN/CO was revised in Linux version(4.14.98), I think this issue will be fixed on next release.
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