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Current limit function of LDO_1P1

Question asked by Takayuki Ishii on May 20, 2018
Latest reply on May 22, 2018 by Takayuki Ishii

Hello community,

 

About VDDHIGH_IN voltage of SABRE_SD i.MX6Q board,

It will dropped while wake from deep sleep mode.

  (SABRE_SD_ILIMIT_disable_2P5_1P1_180518_224516_wakeup.png)

 

It seems that in-rush current to charge a bulk capacitor of NVCC_PLL_OUT.

So enabled current limit of LDO_1P1 by setting PMU_REG_1P1[ENABLE_ILIMIT] bit,

it seems that in-rush current is limited and voltage drop down has been resolved.

  (SABRE_SD_ILIMIT_disable_2P5_enable_1P1_180518_225336_wakeup.png)

But lamp up of NVCC_PLL_OUT is slower than disable of current limit.

 

Is it OK to use a current limit function while wake up from deep sleep mode?

 

[Test environment]

Board : SABRE-SD i.MX6Q

OS : Linux BSP 4.9.11_1.0.0

 

Probe point : 

 ch1 : sh17 (VDDHIGH_IN)

 ch2 : sh17 (VDDHIGH_IN)

 ch3 : SW1_1 (CPUPWRON)

 ch4 : R208 (NVCC_PLL_OUT)

 

Deep Sleep Mode : 

 Use a configuration of 5.2 Deep Sleep Mode (LPM6) in AN4509.

 

Best regards,

Ishii.

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