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Ryan Schaefer
Hi,   Recently I've encountered an issue with atomics and the cache. When data is in a cacheable region (tested with both DDR and OCRAM), any atomic read-modify-write operation (atomic_compare_exchange_strong, fetch_add, etc.) doesn't operate as expected. I've attached an example that illustrates the problem (as well as a patch that applies

Fun Lee
There is RT105x Flash download example project in Keil (check the attached), where is the RT1020 example project ?
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Hello ,   We are using two seperate applications in out flash. The 1st application shall jump to the 2nd by using a jump to absolute address (which is the main routine of the 2nd application).   Is it requited to add IVT to the 2nd application and jump  to ivt or can we jump to main routine directly.   Thank you Ranran